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this is information on a product in full production. june 2012 doc id 023203 rev 1 1/35 35 PM6644 350 ma adjustable step-down regulator datasheet ? production data features 4.5 v to 25 v input voltage range output voltage v out : fixed 3.47 v or adjustable 0.9 v to 8 v 350 ma valley current limit constant-on-time control programmable switching frequency pulse skipping mode (skip mode) at light loads independent en signals latched ovp and uvp applications networking power supply portable applications microcontroller supply industrial supply description the PM6644 is a 350 ma valley current limit step- down regulator capable of delivering an adjustable output voltage in the range between 0.9 v and 8 v. a fixed value of output voltage is also available (3.47 v), saving the external resistor divider. it is housed in a small dfn10 3x3 package. the switching regulator is based on cot (constant-on-time) architecture, that assures fast load transient response; the embedded voltage feed-forward provides nearly constant switching frequency operation. the pulse skipping technique increases efficiency at very light load. the switching frequency can be adjusted from 200 khz to 600 khz through a simple resistor. the switching regulator can be programmed to regulate a fixed value of 3.47 v or it can deliver an adjustable voltage, depending on the fb pin set- up. dfn10 table 1. device summary part number package packing PM6644 dfn10 tube PM6644tr dfn10 tape and reel www.st.com
contents PM6644 2/35 doc id 023203 rev 1 contents 1 simplified application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.2 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.3 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.4 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.5 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.6 typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2 device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.1 switching regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.1.1 output voltage set-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.1.2 constant-on-time control (cot) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.1.3 pwm control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.1.4 skip mode management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.1.5 current sensing and current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.1.6 soft-start and soft-end . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.1.7 monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.1.8 overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.1.9 undervoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.1.10 vcc undervoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.1.11 vcc and byp power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.1.12 3.3 v linear regulator section (ref3) . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.1.13 general fault management: thermal protection . . . . . . . . . . . . . . . . . . . 20 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.1 external component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.1.1 inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.1.2 input capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.1.3 output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.1.4 maximum rms output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4 typical application configuration v out = 8 v . . . . . . . . . . . . . . . . . . . . 25 4.1 test set configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
PM6644 contents doc id 023203 rev 1 3/35 4.2 characterization report . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.3 efficiency vs. load (v in = 12 v, v out = 8 v) . . . . . . . . . . . . . . . . . . . . . . . 27 5 conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
list of tables PM6644 4/35 doc id 023203 rev 1 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 table 2. pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 table 4. thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 table 5. recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 table 6. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 table 7. frequency configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 table 8. fault management summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 9. vcc and byp management (en pin > 2 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 table 10. inductor part number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 table 11. input capacitor part numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 table 12. output capacitor part number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 table 13. dfn10 (3x3 mm) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 table 14. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
PM6644 list of figures doc id 023203 rev 1 5/35 list of figures figure 1. v out = 3.47 v fixed configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. adjustable v out configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. efficiency vs. load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 5. switching frequency vs. load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 6. v out vs. load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 7. vref3 vs. output load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 8. shutdown v in current vs. v in (en=0 v). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 9. no load v in current vs. v in (en=v in ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 10. power-up sequence, no load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 11. power-up sequence, 69 ? load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 12. soft-end, no load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 13. soft-end, 69 ? load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 14. load transient 0-200 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 15. vref3 load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 16. vref3 line regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 17. vref3 line transient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 18. simplified block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 19. on-time generator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 20. constant-on-time controller architecture. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 21. inductor current in skip mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 22. current waveforms in current limit conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 23. schematic and bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 24. no load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 25. load = 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 26. load = 100 ma. switching frequency = 370 khz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 27. load = 300 ma. switching frequency = 410 khz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 28. load step = 0 to 300 ma. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 29. efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 30. load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 31. recommended layout - top layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 32. recommended layout - inner layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 33. recommended layout - bottom layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 0 figure 34. dfn10 (3x3 mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 35. dfn10 (3x3 mm) footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
simplified application schematic PM6644 6/35 doc id 023203 rev 1 1 simplified application schematic figure 1. v out = 3.47 v fixed configuration figure 2. adjustable v out configuration 6to6 6). 6/54 6). 4/. &" 6). 6## "90 2%& 2%& 37 %. '.$ %0 %0 6## 6). 6). 6## 6/54 #). 340- 6 , #/54 !-v 2 2 6/54 6to6 6). 6). 4/. &" 6). 6## "9 0 2%& 2%& 37 %. '.$ %0 %0 6). 6). 6/54 6to6 340- #ontrollersupply 6to6 , #/54 #) . !-v
PM6644 simplified application schematic doc id 023203 rev 1 7/35 figure 3. pinout 1.1 pin description table 2. pin description pin name description 1 ref 1.216 v internal reference voltage. do not connect this pin to any external component. 2fb feedback input for the switching section: if this pin is connected to vcc, out operates at 3.47 v (fixed mode). if this pin is connected to a resistive divider from out to gnd, out can be adjusted from 0.9 v to 8 v. 3t on switching frequency setting. connect to vin with a resistor to properly set the switching frequency. 4en enable (en) pin. the en pin is used to enable both the switching regulator and internal reference. tie to ground to shut down the device. apply 2.1 v or more for normal operation. if the en pin is not used for power sequencing, tie this pin to the vin pin. 5 gnd power and signal ground connection. 6sw the sw pin is the switching node of the switching regulator with integrated power mosfets. connect this pin to the inductor. 7vin input voltage for the switching regulator. bypass to gnd with a 1-2.2 f mlcc capacitor. the vin pin supplies current to the internal switching regulator and to the integrated voltage generator that supplies vcc if byp < 2.4 v. 8vcc output of a regulator that supplies the main switching controller. bypass to gnd with a 1 f capacitor. an integrated voltage generator regulates at 3.8 v (when vin> = 6 v) if byp< 2.4 v. when byp > 3.2 v, the integrated voltage generator shuts down and vcc is connected to byp through a mosfet switch (see figure 18 ). 9 byp vcc bypass pin (byp). if byp > 3.2 v, vcc is supplied by byp through a mosfet switch. bypass to gnd with a 10-100 nf capacitor. 10 ref3 integrated 3.3 v high accuracy reference voltage. bypass to gnd with a 100 nf capacitor. vref3 is the voltage at ref3 pin. exp pad exp pad exposed pad. connect to signal ground.
simplified application schematic PM6644 8/35 doc id 023203 rev 1 1.2 absolute maximum ratings 1.3 thermal data 1.4 recommended operating conditions table 3. absolute maximum ratings parameter value unit vin to gnd -0.3 to 35 v en, sw, ton to gnd -0.3 to vin +0.3 v vcc, byp -0.3 to 6 v ref, fb to gnd -0.3 to vcc +0.3 v ref3 to gnd -0.3 to byp +0.3 v power dissipation at tamb = 25 c 2.25 w maximum withstanding voltage range test condition: cdf-aecq100- 002- ?human body model? acceptance criteria: ?normal performance?. 1000 v table 4. thermal data symbol parameter value unit r thj-a thermal resistance junction to ambient 45 c/w t j junction operating temperature range -40 to 125 c table 5. recommended operating conditions symbol parameter value unit min. typ. max. vin input voltage range 4.5 25 v en en voltage range 0 25 v byp byp operative voltage range 0 5 v switching regulator embedded high-side mosfet (1) rms current capability 300 ma switching regulator embedded low-side mosfet 300 ma 1. refer to section 3.1.4: maximum rms output current .
PM6644 simplified application schematic doc id 023203 rev 1 9/35 1.5 electrical characteristics v in =12 v, no load on ref3, en=v in , fb=vcc, r=1 m ? between ton and vin, t j =25 c unless otherwise specified. table 6. electrical characteristics symbol parameter test condition min. typ. max. unit switching controller output accuracy byp fixed output voltage valley regulation fb=vcc, no load 3.40 3.47 3.54 v fb adjustable output voltage valley regulation (fb=adj) no load, byp=3.47 v; t j =0 c - 70 c (1) 0.88 0.92 v current limit and zero crossing comparator valley current limit 350 380 ma zero crossing current threshold sw voltage ramp slew rate = 40 v/ms 14 22 30 ma 3.3 v voltage reference ref3 ref3 output voltage (vref3 voltage) byp=3.47 v external voltage, no load 3.2 3.3 3.4 v line regulation byp=3.47 v to 5 v, no load 2.3 6.3 mv/v load regulation byp=3.47 v external voltage, 0 ma < lload < 2 ma 500 v vcc supply vcc vcc voltage byp< byp falling threshold, v in > 6 3.4 3.8 4.2 v byp byp falling threshold/ ref3 turn-off threshold 2.4 2.7 v byp rising threshold (i.e. vcc=byp)/ ref3 turn-on threshold 2.9 3.2 v regulator bias currents v in v in shutdown current en=0 v 13 21 a v in quiescent current with byp > byp falling threshold byp=3.47 v (not switching), ref3@no load 26 35 a byp byp quiescent current with byp > byp falling threshold byp=3.47 v (not switching), ref3@no load 190 230 a fault management vcc vcc uvlo threshold rising edge of pvcc 2.7 3 v falling edge of pvcc 2.1 2.6 v
simplified application schematic PM6644 10/35 doc id 023203 rev 1 1.6 typical operating characteristics fb = vcc, r ton = 1 m ? , v in = 12 v, en = vin, byp connected to the switching regulator output, no load unless specified. measurements performed on the evaluation kit (PM6644_dfn). fb overvoltage trip threshold referred to fb nominal regulation point, byp= 3.47 v +14 +20 % fb undervoltage threshold referred to fb nominal regulation point, byp= 3.47 v 62 73 % inputs and outputs fb fb logic level fb logic level to be in fixed mode vcc-0.8 v en en level all circuitry off 1.3 v all circuitry on 2.4 v 1. in the range t j = 0 c-70 c limits are guaranteed by design and stat istical analysis, not production tested. production test at t j =25 c. table 6. electrical characteristics (continued) symbol parameter test condition min. typ. max. unit figure 4. efficiency vs. load figure 5. switching frequency vs. load %fficiency ;= ,/!$;!= %fficiency6).6 %fficiency6).6 %fficiency6).6 !-v %fficiency6).6 &s w ;+( z = ,/!$;!= !-v 3 w itchingfrequency24/.- 3 w itchingfrequency24/.-
PM6644 simplified application schematic doc id 023203 rev 1 11/35 figure 6. v out vs. load figure 7. vref3 vs. output load figure 8. shutdown v in current vs. v in (en=0 v) figure 9. no load v in current vs. v in (en=v in ) figure 10. power-up sequence, no load figure 11. power-up sequence, 69 ? load 6out;6= ,/!$;!= !-v 6out,oadregulation6).6 6out,oadregulation6).6 6out,oadregulation6).6 6out,oadregulation6).6 62%&;6= ,/!$;!= 62%&63 6out load 6).6 62%&63 6out load 6).6 62%&63 6out load 6).6 62%&63 6out load 6).6 !-v % % % % % % % 6).current;u!= 6).;6= 6). shutdo w ncurrent !-v % % % % % % 6).current;u!= 6).;6= 6).operatingcurrent "906out "90'.$6out6 !-v
simplified application schematic PM6644 12/35 doc id 023203 rev 1 figure 12. soft-end, no load figure 13. soft-end, 69 ? load figure 14. load transient 0-200 ma figure 15. vref3 load regulation figure 16. vref3 line regulation figure 17. vref3 line transient 62%&;6= ,oad;!= 2%&,oad2egulation !-v 2%&;6= "90;6= 2%&,ine2egulation !-v
PM6644 simplified application schematic doc id 023203 rev 1 13/35 figure 18. simplified block diagram vin gnd 3 . 3 v reference byp_on vcc ref 3 byp 2.1v (f a lling thr.) 900mv + - vcc vcc_ok 3 .2v (ri s ing thr.) 8 00mv + - byp_on ref ton - + ton_end fb ton_p u l s e gnd fb fb vcc-1v + - s 1 s 2 d c enb m u ltiplexer gnd byp fb=vcc fb=0.9v + - en_ok en 2.4v (ri s ing thr.) 1100mv not(boot_f us e s _ok) gnd s w s ink mo s 3 . 8 v gener a tor not (byp_on) en_ok s w gnd l s mo s h s mo s h s g a te driver l s g a te driver anticro ss cond u ction h s comm a nd l s comm a nd ton_ s t a rt h s comm a nd - + pwm comparator s r q q + - + fb fb_ref toffmin=500n s ton_p u l s e ton_end gnd * s w @ l s mo s on 3 20mv 0mv en s mp s _en ab le s w-gnd @ l s mo s on l s comm a nd ton_ s t a rt s r q q s w-gnd @l s mo s on 0mv - + ref 1.216v reference gener a tor fb_ref=0.9v gnd vth_ref + - bi as reference gener a tor en ref_ok bia s _ok ith_ b i as + - ref_ok bia s en en s mp s _en ab le en en s mp s _en ab le s mp s _en ab le en en s mp s _en ab le f au lt m a n a gement ovp uvp overtemp vcc_ok en no f au lt boot_f us e s _ok ss 0, ss 1 s t a rt u p m a n a gment vcc_ok boot _ fu s e s _ ok no f au lt s mp s _en ab le ss 0, ss 1 fb + - uvp 62 % of fb _ref en ss _end die temper a t u re + - overtemp 150c en boot_f us e s _ok boot_fu s e s _ok en_ok 120 % of fb _ref fb + - boot_f us e s _ok ovp en + - am1177 8 v1
device description PM6644 14/35 doc id 023203 rev 1 2 device description the PM6644 combines a 350 ma valley current limit step-down regulator with a high accuracy 3.3 v voltage reference in a small dfn10 3x3 package. the switching regulator is based on constant-on-time (cot) architecture. this type of control offers a very fast load transient response with a minimum external component count. the switching regulator can regulate 3.47 v in fixed mode (the fb pin tied at vcc) or it can deliver an adjustable voltage between 0.9 v and 8 v (the fb pin connected to the output voltage rail through an external resistor divider). the switching frequency can be adjusted from 200 khz to 600 khz by a resistor between ton and the vin pin. the embedded input and output voltage feed-forward provides nearly constant switching frequency operation. a pulse skipping technique allows increasing efficiency at very light load. the switching regulator has protection against overvoltage, undervoltage and overcurrent. the power mosfet and switching controller of the switching regulator are supplied by vcc voltage. an integrated voltage generator from v in > 6 v provides 3.8 v at the vcc pin when the byp pin < 2.4 v if byp > 3.2 v, the integrated voltage generator is turned off and vcc is connected to byp through a mosfet switch (switch-over function). an integrated 3.3 v linear regulator (supplied by vcc) provides an accurate 3.3 v output (ref3). the PM6644 also provides protection against overtemperature, turning off both switching regulator and 3.3 v reference. 2.1 switching regulator 2.1.1 output voltage set-up the switching sections can be configured in several ways. output voltage is configured with the fb pin. if the fb pin is tied to vcc, the PM6644 regulates 3.47 v. using an external resistor divider the output can be adjusted following this equation: equation 1 where r1, r2 are the resistors of the fb pin divider. ref is a voltage reference used to internally generate the 0.9 v threshold used to set the output voltage of the switching regulator. 2.1.2 constant-on-ti me control (cot) the PM6644 implements a pseudo-fixed frequency algorithm using the cot architecture. v out 0.9v = r1 r2 ------- - 1 + ?? ?? ?
PM6644 device description doc id 023203 rev 1 15/35 the cot architecture bases its algorithm on the output ripple derived across the output capacitor?s esr. the controller has an internal on-time (t on ) generator triggered on the output voltage valley: when v out reaches the regulation value a new t on starts. the t on duration is given by the following equation: equation 2 where t on is the on-time duration, c is an integrated capacitance (9.3 pf typ.), r ton is the resistor between the vin and ton pins, v out is the sensed output voltage and v in is the input voltage (sensed at the vin pin). figure 19 shows how the on-time is generated. figure 19. on-time generator the duty cycle in a buck converter is: equation 3: the switching frequency in continuous current mode (ccm) is: equation 4 in order to reduce noise in t on generation, a further capacitance c 1 may be added between the ton pin and the gnd pin. in this case the switching frequency is: t on 0.9v r ton c ?? v in ---------------------------------------------- = ton vin c=9. 3 pf byp =0.26 3 fb + - on time s t a rt ton t ton t r ton am11779v1 t on t sw ----------- d v out v in -------------- == f sw d t on ---------- - v out v in 0.9v r ton c ?? v in ---------------------------------------------- ---------------------------------------------- ---------------------------------------------- - v out 0.9v r ton c ?? ---------------------------------------------- = ==
device description PM6644 16/35 doc id 023203 rev 1 equation 5 the switching frequency is theoretically constant, but in a real application it depends on parasitic voltage drops that occur during the charging path (high-side switch resistance, inductor resistance (dcr)) and discharging path (low-side switch resistance, dcr). as a result, the switching frequency increases as a function of the load current. the following table shows some examples of switching frequencies that can be selected through the ton pin (c 1 not mounted): 2.1.3 pwm control figure 20 shows the simplified schematic of the constant-on-time controller. the cot architecture uses a minimum off-time (t offmin = 500 ns typ.) to allow inductor valley current sensing on the synchronous switch. a minimum on-time is also introduced to assure the correct startup sequence. an adaptive anti-cross conduction algorithm avoids current paths between vin and gnd during switching transition. table 7. frequency configurations t on resistor r_t on v out = 3.47 v frequency load = 200 ma (pwm mode) v out = 0. 9 v frequency load = 200 ma (pwm mode) 2 m 245 khz 1 m 470 khz 500 k 260 khz 250 k 495 khz f sw d t on ---------- - v out v in 0.9v r ton cc 1 + () ?? v in ---------------------------------------------------------------- - ---------------------------------------------------------------- - ----------------------------------------------------------------- v out 0.9v r ton cc 1 + () ?? ---------------------------------------------------------------- - = ==
PM6644 device description doc id 023203 rev 1 17/35 figure 20. constant-on-time controller architecture the PM6644 has a one-shot generator that turns on the high-side mosfet when the following conditions are satisfied simultaneously: the pwm comparator is high the inductor valley current is below the current limit threshold the minimum off-time has timed out a slope proportional to the low-side mosfet current (a * r ds(on) * i ls ) is added at the input of the pwm comparator in order to ensure stability. the slope determines a load line on the output voltage of about 0.16 ? when the controller works in pwm mode. 2.1.4 skip mode management to improve efficiency at light load, the PM6644 implements pulse skip operation mode. the inductor current is sensed and, if it is equal to zero, the synchronous mosfet is turned off. as a consequence, the output capacitor is left floating and the discharge depends only on the current sourced by the load. the new t on starts when the output reaches the voltage regulation. as a consequence, at light load conditions the switching frequency decreases, improving the total efficiency of the converter. working in discontinuous current mode, the switching and the conduction losses are reduced by skipping some cycles. if the output load is high enough to make the system work in ccm (continuous conduction mode), skip mode is automatically changed into pwm mode. r2 r1 vo u t s en s e fb - + pwm comparator 0.9v 0.725 vref toffmin s r q q ton gener a tor pha s e - gnd + - 3 20mv vin gnd pha s e vo u t s en s e *rd s on*il s il s *rd s on*il s + am1179 3 v1
device description PM6644 18/35 doc id 023203 rev 1 2.1.5 current sensing and current limit the PM6644 implements a positive valley current limit to protect the application from an overcurrent fault. the inductor current is sensed during the off-time t off by measuring the voltage drop across the integrated low-side mosfet using the mosfet r ds(on) as a lossless sensing element. the voltage drop is then compared with a fixed voltage threshold so that the inductor (or low-side mosfet) trip current of the comparator is about 350 ma (minimum value). a new switching cycle cannot start until the inductor current goes lower than the 350 ma current limit threshold. as a result, the device can work with a maximum inductor rms current i lrms (max) equal to: equation 6 where ? i l is the inductor current ripple. figure 22. current waveforms in current limit conditions figure 21. inductor current in skip mode tsw ccm load> ?il/2 ?il il load< ?il/2 t t il ?il tsw dcm am117 8 1v1 i lrms max () 350ma i l ? 2 ------- - + = time m a xim u m dc c u rrent 3 50ma v a lley c u rrent limit thre s hold ind u ctor c u rrent c u rrent am117 8 0v1
PM6644 device description doc id 023203 rev 1 19/35 2.1.6 soft-start and soft-end the switching section has an en pin. a non-programmable soft-start procedure takes place when the en pin rises above 2.1 v. to prevent high input inrush currents, the current limit is increased from 25% to 100% of the current limit threshold with steps of 25%. the procedure is not programmable and ends typically in 2.8 ms. the overvoltage protection is always active while the undervoltage protection is enabled at the end of the 2.8 ms. driving one en pin below 1.8 v makes the section perform a soft-end: gate driving signals are pulled low and the output is discharged through an internal mosfet with r ds(on) of 50 ? typ. 2.1.7 monitoring the PM6644 controls its switching output to prevent any damage or uncontrolled working condition. 2.1.8 overvoltage protection the PM6644 provides a latched overvoltage protection (ovp). if the output voltage rises above 120% of the nominal value, a latched ovp protection is activated. the controller turns on the low-side mosfet keeping the output voltage at 0 v. the protection is latched and this fault is cleared by cycling vcc < 2.1 v and then > 3 v. 2.1.9 undervoltage protection if, during regulation, the output voltage drops under 62% of the nominal value, an undervoltage latched fault is detected. the controller performs a soft-end procedure (see section 2.1.6 ). the undervoltage fault is reset by toggling the en pin or by cycling vcc < 2.1 v and then > 3 v. 2.1.10 vcc undervoltage the device monitors the voltage at the vcc pin. the switching section can start operating only if the voltage at the pvcc pin is above 3 v. if pvcc falls below 2.1 v, the switching section is turned off until pvcc voltage goes over 3 v. table 8. fault management summary fault condition device behavior overvoltage v out > +120% the low-side mosfet is turned on keeping the output voltage at 0 v. latched fault, cleared toggling en or cycling vcc < 2.1 v and then > 3 v. undervoltage v out < 62% the controller performs a soft-end. latched fault cleared toggling en or cycling vcc < 2.1 v and then > 3 v. vcc undervoltage v cc < 2.1 v the controller turns off the switching section until pvcc voltage goes over 3 v. not latched fault.
device description PM6644 20/35 doc id 023203 rev 1 2.1.11 vcc and by p power management vcc supplies both the controller and the drivers of the integrated high-side and low-side mosfets. an integrated 3.8 v generator from the vin pin provides the voltage to the vcc pin. the PM6644 provides a switch-over function that allows the turning-off of the 3.8 v generator when a voltage is applied at the byp pin. if the voltage at the byp pin is higher than 3.2 v, the internal generator is turned off and the vcc pin is connected with an internal switch (16 ? typ.) to the byp pin. this feature decreases the power dissipation of the device. if byp < 2.4 v, the internal switch is turned off and the vcc output is supplied with the 3.8 v generator. 2.1.12 3.3 v linear regulator section (ref3) the PM6644 has an integrated linear regulator (ref3) that can provide a maximum rms current of 5 ma. the input of the linear regulator is the byp pin. the linear regulator is turned on when byp > 3.2 v. connect pin ref3 with a 100 nf ceramic capacitor to gnd. 2.1.13 general fault mana gement: thermal protection if the internal temperature of the device exceeds typically +150 c, the controller shuts down immediately all the internal circuitry. the switching section performs the soft-end management. toggling en or cycling vcc < 2.1 v and then vcc > 3 v, resets the latched fault. table 9. vcc and byp management (en pin > 2 v) byp vin vcc 5 v generator switch-over resistance < 2.4 v < 6 v v in - 1 v enabled < 2.4 v 3.8 v enabled > 3.2 v byp disabled 16 ?
PM6644 application information doc id 023203 rev 1 21/35 3 application information 3.1 external component selection 3.1.1 inductor selection once the switching frequency is defined, inductor selection depends on the desired inductor ripple current and load transient performance. low inductance means greater ripple current and may generate greater output noise. on the other hand, low inductor values involve fast load transient response. a good compromise between the transient response time, the efficiency, the cost and the size, is to choose the inductor value in order to maintain the inductor current ripple ? i l between 20% and 50% of the maximum output current i load (max.). the maximum ? i l occurs at the maximum input voltage. with these considerations, the inductor value can be calculated with the following relationship: equation 7 where f sw is the switching frequency, v in is the input voltage, v out is the output voltage and ? i l is the selected inductor current ripple. in order to prevent overtemperature working conditions, the inductor must be able to provide an rms current greater than the maximum rms inductor current i lrms : equation 8 where ? l (max.) is the maximum current ripple: equation 9 if hard saturation inductors are used, the inductor saturation current should be much greater than the maximum inductor peak current ipeak: equation 10 using soft saturation inductors it is possible to choose inductors with a saturation current limit at nearly ipeak. in ta b l e 1 0 there is a list of some inductor part numbers. l v in v out ? f sw i l ? ? ----------------------------- - v out v in -------------- ? = i lrms i load max () () 2 ? i l max () () 2 12 -------------------------------- - + = ? i l max () v inmax v out ? f sw l ? --------------------------------------- v out v inmax ------------------ - ? = ipeak i load max () ? i l max () 2 ------------------------- + =
application information PM6644 22/35 doc id 023203 rev 1 . 3.1.2 input capacitor selection in a buck topology converter the current that flows into the input capacitor is a pulsed current with zero average value. the input rms current of the switching regulator can be roughly estimated as follows: equation 11 where d is the duty cycles and i load (max.) is the maximum load current of the switching regulator. the input capacitor should be chosen with an rms rated current higher than the maximum rms current given by the formula. tantalum capacitors are good in terms of low esr and small size, but they can occasionally burn out if subjected to very high current during the charge. ceramic capacitors usually have a higher rms current rating with smaller size and they remain the best choice. in battery-powered applications, a 1-2.2 f input ceramic capacitor can be enough. ta b l e 1 1 shows an example of ceramic capacitor part numbers. 3.1.3 output capacitor selection the controller can work with ceramic or tantalum output capacitors. the selection of the output capacitor impacts on the stability of the controller: equation 12 equation 13 table 10. inductor part number manufacturer part number inductance ( h) dcr ( ?) rms current (a) (1) 1. 40 c temperature rise. saturation current (a) (2) 2. 20% inductance drop. coilcraft epl3015-333ml 33 0.989 0.59 0.32 coilcraft lps3314-333ml 33 0.92 0.58 0.38 coilcraft mss5121-333ml 33 0.48 0.76 0.64 table 11. input capacitor part numbers manufacturer part number capacitor value ( f) rated voltage tayio yuden tmk212bj225mg-t 2.2 25 i cinrms i load max () d1d ? () ? ? = c out 18 ? 2 f sw k ?? ? ---------------------------------------- > 0.9v v out -------------- =
PM6644 application information doc id 023203 rev 1 23/35 k is a constant (< 0.1) that defines the ratio between the controller bandwidth and the switching frequency. the output capacitor must store the inductor energy generating an output ripple within the output voltage ripple requirements. if an output tantalum capacitor is used, in ccm the voltage ripple v rippleout is given by: equation 14 a low esr capacitor is required to reduce the output voltage ripple. if an output ceramic capacitor is used, in ccm the voltage ripple v rippleout is given by: equation 15 finally the output capacitor choice heavily impacts the load transient response. ta b l e 1 2 shows a list of some capacitor part numbers. 3.1.4 maximum rms output current both high-side and low-side embedded power mosfets of the switching regulator can withstand a maximum rms current of 300 ma. the maximum sustainable rms output current i loadrms of the switching regulator depends on the application specifications of: input voltage v in output voltage v out inductor current ripple ? i l (that depends on the switching frequency f sw and on the inductor value l, according to equation 7 ). the maximum rms currents of high-side (i rms,hs ) and low-side (i rms,ls ) mosfets are given by: equation 16 table 12. output capacitor part number manufacturer part number capacitor value ( f) rated voltage (v) esr max. (m ? ) tayio yuden jmk212bj226mg-t 22 6.3 70 sanyo poscap 6tpc33m 33 6.3 7 to 15 v rippleout r out ? i l ? = v rippleout t sw ? i l ? 8c out ? ------------------------- = i rms hs , di lrms di load () 2 ? i l () 2 12 --------------- - + ? 300ma = = ? =
application information PM6644 24/35 doc id 023203 rev 1 equation 17 where i load is the rms output current. the minimum i load between equation 16 and equation 17, combined with rms load current limitation due to valley current limit ( equation 6 ), determines the maximum rms output current i loadrms sustained by the switching regulator: equation 18 example 1 v in = 5 v, fb = vcc (v out = 3.47 v), ? i l = 68.5 ma (l = 33 uh, fsw = 470 khz). high-side can withstand a load current of i loadrms = 432 ma. low-side can withstand a load current of i loadrms = 977 ma. i loadrms due to valley current limit = 384 ma. as a result, i loadrms = 384 ma (limitation determined by the valley current limit). the PM6644 switching regulator can source 384 ma rms. 384 ma is also the peak load current. example 2 v in = 25 v, fb = vcc (v out = 3.47 v), ? i l = 192.5 ma (l = 33 uh, fsw = 470 khz). high-side can withstand a load current of i loadrms = 2164 ma. low-side can withstand a load current of i loadrms = 344 ma. i loadrms due to valley current limit = 446 ma. as a result, i loadrms = 344 ma (limitation determined by the low-side rms max. current). the PM6644 switching regulator can source 344 ma rms. the peak load current is 446 ma. i rms ls , i lrms 1d ? () i load () 2 ? i l () 2 12 --------------- - + ? 300ma = = = i loadrms min 300ma d ------------------- ?? ?? 2 ? i l () 12 ------------ - 2 ? 300ma 1d ? ------------------- ?? ?? 2 ? i l () 12 ------------ - 2 ? 350ma ? i l 2 -------- + ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? =
PM6644 typical application configuration v out = 8 v doc id 023203 rev 1 25/35 4 typical application configuration v out = 8 v this section is intended as a guideline for all the measurements involving the PM6644 device with v in = 12 v 5%, v out = 8 v. 4.1 test set configuration the device-under-test (d.u.t.) has been mounted on the designed evaluation kit with the following schematic and bill of materials. figure 23. schematic and bill of materials 4.2 characterization report steady-state waveforms ,#/),#2!&4,03 -,# # ##*2!#45 #/-0/.%.4&//402).43 222 ## # # ,mm x mm 0-mm x mm 6out6 -a x loadm! &s w k( z # p 6in6 # u # u6 # u6 340- 4/. &" 6). 6## "90 2%& 2%& 37 %. '.$ %0 %0 "90 u , 6). 6## 6). 6). * 6). * 6). 2 k 2 k /54 2 - 6). * 6/54 * 6/54 /54 !-v figure 24. no load figure 25. load = 50 ma
typical application configuration v out = 8 v PM6644 26/35 doc id 023203 rev 1 figure 26. load = 100 ma. switching frequency = 370 khz figure 27. load = 300 ma. switching frequency = 410 khz figure 28. load step = 0 to 300 ma
PM6644 typical application configuration v out = 8 v doc id 023203 rev 1 27/35 4.3 efficiency vs. load (v in = 12 v, v out = 8 v) the output voltage varies from 8.096 v at light load to 7.916 v at heavy load. load regulation = 180 mv. figure 29. efficiency figure 30. load regulation %fficiency ;= ,/!$;!= !-v 6out;6= ,/!$;!= !-v
typical application configuration v out = 8 v PM6644 28/35 doc id 023203 rev 1 bias current vin =12.158 v vin = 12.158 v v out = 8.150 v (externally forced) v out = 8.107 v no switching no load, pulse skipping (820 hz, double pulses) byp = gnd byp = gnd ivin = 126 a ivin = 444 a
PM6644 conclusion doc id 023203 rev 1 29/35 5 conclusion the device regulates v out = 8 v properly with the designed schematic and bill of material. the 12 v input voltage range should have an accuracy of 5%. pcb design guidelines the layout is very important in terms of efficiency, stability and system noise. it is possible to refer to the PM6644 evaluation kit board for a complete layout example. for good pc board layout, follow these guidelines: place all the power components (inductors, input and output capacitors) on the top side. refer them to a ground plan, gnd in an inner layer. connect the exposed pad of the PM6644 to the gnd plan with vias (design a gnd pad on the top side with the same size as the exposed pad). on the top side connect the gnd pin with a short trace to the exposed pad. place input capacitors close to the vin pin, in order to minimize ac current drops during high-side mosfet turn-on. add vias to the gnd plan. place the output capacitor close to the gnd pin, in order to minimize ac current drops during high-side and low-side mosfet turn-on. add vias to the gnd plan. place filtering capacitors close to pins ref3, byp and vcc. place the resistor near the ton pin in order to minimize parasitic capacitance on the ton pin. figure 31. recommended layout - top layer figure 32. recommended layout - inner layer
conclusion PM6644 30/35 doc id 023203 rev 1 figure 33. recommended layout - bottom layer
PM6644 package mechanical data doc id 023203 rev 1 31/35 6 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. table 13. dfn10 (3x3 mm) mechanical data dim. mm min. typ. max. a 0.80 0.90 1.00 a1 0.02 0.05 a2 0.55 0.65 0.80 a3 0.20 b 0.18 0.25 0.30 d 2.85 3.00 3.15 d2 2.20 2.70 e 2.85 3.00 3.15 e2 1.40 1.75 e0.50 l 0.30 0.40 0.50 ddd 0.08
package mechanical data PM6644 32/35 doc id 023203 rev 1 figure 34. dfn10 (3x3 mm) 7426335_g
PM6644 package mechanical data doc id 023203 rev 1 33/35 figure 35. dfn10 (3x3 mm) footprint 7426335_g
revision history PM6644 34/35 doc id 023203 rev 1 7 revision history table 14. document revision history date revision changes 19-jun-2012 1 initial release.
PM6644 doc id 023203 rev 1 35/35 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by two authorized st representatives, st products are not recommended, authorized or warranted for use in military, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or register ed trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2012 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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